Referring to a power semiconductor device constituted by a power vertical metal-oxide film-semiconductor field effect transistor (Metal Oxide Semiconductor Field Effect Transistor:MOSFET) and a diode which is described in Patent Document 1, diodes are arranged in at least one line in a peripheral edge portion of a cell region of the MOSFET, that is, an adjacent region to a gate pad portion as shown in FIGS. 1 and 2 of the Document. Each of the diodes absorbs a hole injected in a forward bias into an N-type semiconductor layer on a drain side from a P well and a P base shown in FIG. 2 of the Document when the MOSFET is switched from an ON state to an OFF state. For this reason, the structure described in the Document can prevent a parasitic transistor shown in FIG. 3 of the Document from being turned ON when the MOSFET is switched from the forward bias into a reverse bias.
With the structure described in the Document, the P base being the P well of the MOSFET is electrically connected to a source electrode through a back gate as shown in FIG. 2.